1. Field
Various embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory that performs a refresh operation.
2. Description of the Related Art
With the increase in integration degree of semiconductor memory, the interval between word lines in the semiconductor memory has been reduced. The reduced interval between the word lines may cause an increase in coupling effects between adjacent word lines.
In general, whenever data is inputted to or outputted from a memory cell in a semiconductor memory, a word line connected to the memory cell toggles between an active state (an active operation) and an inactive state (a precharge operation). Due to the coupling phenomenon, voltage levels of adjacent word lines may be destabilized by repeated activations/deactivations of word lines that are being read or programmed. The destabilized voltage levels may result in data of memory cells coupled to the adjacent word lines being lost or damaged. This phenomenon is referred to as word line disturbance (or word line hammering). If the word line disturbance is bad enough, the data of memory cells may be lost before the memory cells are refreshed.
To resolve this concern, a target row refresh (TRR) operation may be performed. The TRR operation is performed to prevent the degradation in cell characteristics of memory cells couple to word lines that are adjacent to highly active word lines. Active and precharge operations (i.e., a TRR operation) are performed on a target word line corresponding to a frequently activated word line and adjacent word lines. The TRR operation may refresh the degraded cell data to retain memory cell charges at normal data levels.